Integrated circuits such as processors, memory controllers, and memory devices are typically manufactured by processing many layers on a substrate. The layers may undergo many operations such as deposition, doping, etching, polishing, and the like, during manufacture. As each layer is deposited, attempts are typically made to provide uniformity in thickness and height, or “planarization,” of the layers. As device features scale down in modern process technologies, the allowable tolerances also typically scale down, and uniform planarization of layers becomes increasingly difficult to achieve.
Modern integrated circuits may have dozens of layers that are subject to varying degrees of planarization requirements. Further, different types of layers may have varying types of commonly occurring features that present obstacles to planarization. For example, diffusion layers may include voids that isolate different circuits such as transistors. The voids may be filled with “shallow trenches” subsequently covered by later-deposited layers such as passivation layers. The occurrence of shallow trenches may result in passivation layer thickness variations, making uniform planarization more difficult.